This invention relates to programmable logic integrated circuitry devices, and more particularly to driver circuitry for use in such devices.
As is well known to those skilled in the art, programmable logic devices typically include many regions of programmable logic and programmable interconnection resources for selectively conveying signals to, from, and between the logic regions. Each logic region is programmable to perform any of several relatively simple logic operations on input signals applied to the logic region in order to produce one or more logic region output signals. The interconnection resources are programmable to interconnect the logic regions in any of many different configurations so that very complex logic tasks can be performed by concatenating the logic regions in various ways.
Examples of programmable logic devices are shown in Cliff et al. U.S. Pat. No. 5,689,195, Cliff et al. U.S. Pat. No. 5,909,126, Cliff et al. U.S. Pat. No. 5,963,049, Jefferson et al. U.S. Pat. No. 6,215,326, and Ngai et al. U.S. patent application Ser. No. 09/516,921, filed Mar. 2, 2000, all of which are hereby incorporated by reference herein in their entireties.
At various locations in the interconnection resources of programmable logic devices signals may need to be strengthened in order to propagate along a relatively long interconnection conductor or to continue to propagate along such a conductor or succession conductors. Such signal strengthening is variously referred to as buffering, re-buffering, driving, or the like, and it may be produced by circuit elements that are variously called buffers, drivers, tri-state drivers, or the like. In general, these various terms are used interchangeably herein. There are many different places in a programmable logic device at which signal buffering may be needed. For example, the output signal of a logic region may need buffering to enable it to better drive an interconnection conductor. A signal reaching the end of an interconnection conductor segment may need to be buffered so that it can drive the next interconnection conductor segment. A signal turning from a horizontal interconnection conductor segment to a vertical interconnection conductor segment (or vice versa) may need to be buffered so that it can drive the receiving segment. Signals received by the device from external circuitry may need buffering, and signals that will be output signals of the device may need buffering in order to drive external circuitry.
Heretofore the driver circuitry needed in each circuit context has generally been designed specifically for that context. This can lead to a proliferation of buffer circuit designs, which can in turn increase the difficulty of laying out and otherwise designing a new programmable logic device.
In view of the foregoing, it is an object of this invention to improve and simplify the design of programmable logic devices.
It is a more particular object of this invention to provide improved and simplified (e.g., by virtue of being more standardized) driver circuitry for programmable logic devices.
These and other objects of the invention are accomplished in accordance with the principles of the invention by providing a driver circuit module for programmable logic devices, which module can be adapted to perform any of several different tasks, and which module can therefore be used in any of several different contexts in a programmable logic device. The generalized driver module of this invention has the capability of driving a signal from any of several sources (e.g., an adjacent region of programmable logic or adjacent ends of interconnection conductors) to any of several destinations (e.g., adjacent ends of interconnection conductors). Each instance of the driver module on the programmable logic device is hardware-configurable to meet the requirements of that particular instance. For example, the hardware configuration or hardware programming of an instance of the driver module may include providing the metal in the module needed to complete certain connections while omitting the metal needed for other connections.
Another aspect of the invention relates to the manner in which driver modules, interconnection conductors, and logic regions are disposed on a programmable logic device and inter-related. In this aspect the driver modules can be either the hardware-configurable modules described briefly in the preceding paragraph, or they can be software-programmable driver modules (e.g., of known design). A plurality of logic regions are disposed on the programmable logic device in a row. A plurality of interconnection conductor channels extend along the row. The interconnection conductors in each of the channels are interrupted at spaced locations along the row by driver modules. Each driver module is adjacent a respective one of the logic regions and can drive a signal from the adjacent logic region or the conductors interrupted by that driver module onto some or all of the conductors interrupted by that module. The modules in the various channels are preferably offset from one another along the row. The spacing of the spaced locations in each channel is preferably uniform for all channels and equal to the spacing between logic regions that are separated from one another by several other logic regions. This spacing is also preferably an optimal or at least desirable spacing for re-buffering signals that must be propagated more than one conductor-segment-length along a conductor channel. The driver modules are preferably the sole means by which signals can be driven onto the conductors. This arrangement of logic regions, interconnection conductors, and driver modules has a great many advantages such as improving signal propagation timing uniformity and predictability.
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description of the preferred embodiments.